Suman Kanjilal

Title: Suman Kanjilal: Innovator in VLSI Circuit Design

Introduction

Suman Kanjilal is a notable inventor based in New Brunswick, NJ (US). He has made significant contributions to the field of VLSI (Very Large Scale Integration) circuits, particularly in the area of testability. His innovative approach has paved the way for advancements in circuit design and testing methodologies.

Latest Patents

Suman Kanjilal holds 1 patent for his work titled "VLSI circuits designed for testability and methods for producing them." This patent describes a VLSI circuit that includes memory, which is conceptualized as a finite state object machine. For enhanced testability, a finite state test machine is embedded within the finite state object machine. To facilitate this embedding, the object test machine is partitioned into components, with separate test machines embedded into each component. These augmented components are interconnected to form a composite machine for testing. The patent also outlines the special relations that must be satisfied to maintain the same test generation complexity as the object machine with a single embedded test function.

Career Highlights

Throughout his career, Suman Kanjilal has worked with prestigious institutions, including Rutgers, The State University of New Jersey, and NEC USA, Inc. His experience in these organizations has contributed to his expertise in VLSI circuit design and testing.

Collaborations

Suman has collaborated with esteemed colleagues such as Srimat T Chakradhar and Vishwani D Agrawal. Their joint efforts have further advanced the field of VLSI circuits and testing methodologies.

Conclusion

Suman Kanjilal's contributions to VLSI circuit design and testability have established him as a prominent figure in the field. His innovative patent and collaborations reflect his commitment to advancing technology in circuit design.