Milpitas, CA, United States of America

Suketu Desai


Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2019-2020

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3 patents (USPTO):Explore Patents

Title: Suketu Desai: Innovator in Integrated Circuit Design

Introduction

Suketu Desai is a notable inventor based in Milpitas, CA (US). He has made significant contributions to the field of integrated circuit design, holding a total of 3 patents. His work focuses on enhancing the efficiency and performance of integrated circuits through innovative methodologies.

Latest Patents

One of Suketu Desai's latest patents is titled "Critical path aware voltage drop analysis of an integrated circuit." This invention relates to a method for identifying cell instances with the largest power consumption values and analyzing circuit timing paths to perform voltage drop analysis effectively. Another significant patent is "Modeling of sequential circuit devices of multi-clock domain IC design for a transient vectorless power analysis." This invention involves a computer executing a scheduling cycle based on dominant clock frequencies to optimize power analysis in multi-clock domain integrated circuits.

Career Highlights

Suketu Desai is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of integrated circuit design. His expertise in voltage drop analysis and power optimization has positioned him as a valuable asset in the industry.

Collaborations

Suketu has collaborated with talented coworkers such as Anshu Mani and Avnish Varma, contributing to various projects that enhance the capabilities of integrated circuit technologies.

Conclusion

Suketu Desai's contributions to integrated circuit design through his patents and work at Cadence Design Systems, Inc. highlight his role as an influential inventor in the field. His innovative approaches continue to shape the future of integrated circuit technology.

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