Suwon-si, South Korea

Sujin Park

This inventor holds 3 USPTO granted patents and 2 published patent applications and 1 EPO patent. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sujin Park. Retrieved from https://idiyas.com/inventor/sujin-park-sdp3qcbq

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 3 


Average Co-Inventor Count = 5.0


Company Filing History:


Years Active: 2026

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3 patents (USPTO):Explore Patents

Title: Sujin Park: Semiconductor Memory Device Inventor

Introduction

Sujin Park is an inventor associated with Suwon-si, South Korea, and Samsung Electronics Ltd. Park’s patent work includes semiconductor memory technologies. The supplied information lists 3 patents.

Latest Patents

One of Park’s latest patents is “Memory Device for Biasing Dummy Global Bitline.” It describes a memory device with first and second global bitlines positioned near opposite edges of a memory cell region, along with dummy global bitlines in its central portion. A bitline sense amplifier connects to these bitlines, while a first layer of the memory cell region connects to a second layer of the sense amplifier region and applies a bias voltage to each dummy global bitline.

Another listed patent is “Semiconductor Device and Electronic System Including the Same.” The supplied information does not include further details about its design or operation.

Career Highlights

Park’s listed patent portfolio reflects work in semiconductor devices and memory architecture. The available information identifies Samsung Electronics Ltd. as Park’s company.

Collaborations

Kyoungmin Kim and Minchae Kim are listed as Park’s coworkers. The supplied information does not specify their roles or contributions to the patents.

Conclusion

Sujin Park’s listed inventions focus on semiconductor technology, including a memory device designed to bias dummy global bitlines.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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