Pleasanton, CA, United States of America

Sudhir Koul


Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 187(Granted Patents)


Company Filing History:


Years Active: 2012

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1 patent (USPTO):Explore Patents

Title: Sudhir Koul: Innovator in Circuit Analysis Technology

Introduction

Sudhir Koul is a prominent inventor based in Pleasanton, CA (US). He has made significant contributions to the field of circuit analysis, particularly in minimizing circuit crosstalk. His innovative approach has led to the development of a unique patent that addresses critical challenges in electronic circuit design.

Latest Patents

Sudhir Koul holds a patent for a technology titled "Victim Net Crosstalk Reduction." This invention provides a circuit analysis tool enabled with software instructions aimed at minimizing circuit crosstalk. The tool calculates a first circuit victim net delay range, which includes a minimum delay (Vmin) and a maximum delay (Vmax). Additionally, it incorporates a second circuit that supplies an aggressor net delay range, ensuring that the aggressor net delay range overlaps with the victim net delay range. This innovative solution allows for the reduction of crosstalk between circuits without increasing the maximum signal delay of the first circuit.

Career Highlights

Sudhir Koul is currently employed at Applied Micro Circuits Corporation, where he continues to develop cutting-edge technologies in circuit design. His work has been instrumental in advancing the capabilities of electronic systems, making them more efficient and reliable.

Collaborations

Sudhir collaborates with various professionals in his field, including his coworker, Sunil Kumar Singla. Their combined expertise contributes to the innovative projects at Applied Micro Circuits Corporation.

Conclusion

Sudhir Koul's contributions to circuit analysis technology exemplify the impact of innovation in the electronics industry. His patent for victim net crosstalk reduction showcases his commitment to enhancing circuit performance while addressing critical design challenges.

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