Saratoga, CA, United States of America

Stephan Hoerold


Average Co-Inventor Count = 2.1

ph-index = 5

Forward Citations = 110(Granted Patents)


Location History:

  • Sunnyvale, CA (US) (2003 - 2005)
  • Saratoga, CA (US) (2008 - 2009)

Company Filing History:


Years Active: 2003-2009

Loading Chart...
5 patents (USPTO):Explore Patents

Title: Innovations by Stephan Hoerold in Integrated Circuit Design

Introduction

Stephan Hoerold is a notable inventor based in Saratoga, CA (US), recognized for his contributions to integrated circuit design. With a total of 5 patents, he has made significant advancements in the field, particularly in methods that enhance the efficiency and functionality of circuit layouts.

Latest Patents

One of his latest patents is titled "Density-based layer filler for integrated circuit design." This innovative system and method address the challenges of density-based layer filling on design layouts for integrated circuit devices. The density-based layer filler identifies open areas on a design layer where minimum density rules are not met and inserts dummy shapes in those areas. These dummy shapes are constructed to comply with other design rules, ensuring that the integrity of the design is maintained. The filler accesses a configuration file containing layer density rules and generates a run deck based on its contents. It can be applied iteratively to a design, checking windows of various sizes according to specified parameters. Additionally, the dummy shapes can be electrically connected to an existing ground wire after insertion.

Another significant patent by Hoerold is "Fullchip functional equivalency and physical verification." This method ensures that the reference Register Transfer Logic (RTL) remains equivalent to the physical layout design of an integrated circuit. It achieves this by maintaining a reference netlist derived from symbolic connectivity, which is crucial for verifying the functionality of the design.

Career Highlights

Stephan Hoerold has made substantial contributions to the field of integrated circuit design during his career at Sun Microsystems, Inc. His work has focused on developing innovative solutions that improve the design and verification processes of integrated circuits.

Collaborations

Throughout his career, Hoerold has collaborated with talented professionals, including Manjunath D Haritsa and Arjun Dutt. These collaborations have fostered an environment of innovation and have led to the development of groundbreaking technologies in the field.

Conclusion

Stephan Hoerold's contributions to integrated circuit design through his patents and collaborative efforts have significantly impacted the industry. His innovative approaches continue to shape the future of circuit design and verification.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…