Fremont, CA, United States of America

Stanley Matsuba

This inventor holds 1 USPTO granted patent. Top assignee: Other. Active years: 1996.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Stanley Matsuba. Retrieved from https://idiyas.com/inventor/stanley-matsuba-c3ucbtw2

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 74(Granted Patents)


Company Filing History:

goldMedal1 out of 834,708 
Other
 patents

Years Active: 1996

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1 patent (USPTO):Explore Patents

Title: Stanley Matsuba and His Patent for an Integrated-Circuit Adapter

Introduction

Stanley Matsuba is an inventor associated with Fremont, California. His patent work addresses the mounting and electrical connection of integrated circuits to printed circuit boards.

Latest Patents

Matsuba is credited with 1 patent: “Reduced Crosstalk and Shielded Adapter for Mounting an Integrated Chip.” The invention describes an adapter with socket-contact receiving members that hold the pins of an integrated circuit and connect them to contacts on a printed circuit board. Spacing between adjacent members leaves room to inspect solder joints, while connections between the members form a single unit. The adapter is designed for use with different types of integrated-chip packages.

Career Highlights

The available information identifies Matsuba’s patent contribution but does not specify his employer or provide further details about his professional career.

Collaborations

David Kim is identified as Matsuba’s coworker. The available information does not specify Kim’s role in the patent or the nature of their collaboration.

Conclusion

Stanley Matsuba’s patent presents a practical approach to integrated-circuit mounting, combining electrical connections with spacing that supports solder-joint inspection.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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