Hyderabad Telangana, India

Sri Ananda Sai Jannabhatla

This inventor holds 4 USPTO granted patents and 2 published patent applications. Top assignee: Qualcomm Incorporated. Active years: 2025-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sri Ananda Sai Jannabhatla. Retrieved from https://idiyas.com/inventor/sri-ananda-sai-jannabhatla

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 4 

% Patents Active = 50.0

Average Co-Inventor Count = 5.9

ph-index = 1


Company Filing History:


Years Active: 2025-2026

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4 patents (USPTO):Explore Patents

Title: Innovations by Sri Ananda Sai Jannabhatla

Introduction

Sri Ananda Sai Jannabhatla is a notable inventor based in Hyderabad, Telangana, India. He has made significant contributions to the field of memory data integrity and performance enhancement in die architectures. With a total of 4 patents, his work reflects a deep understanding of memory systems and their operational efficiencies.

Latest Patents

One of his latest patents is titled "Apparatus and methods for memory data integrity within die architectures." This invention focuses on improving performance and data integrity within die architectures. In this patent, a die package includes a memory device and a processor that is coupled to the memory device. The memory device serves as a cache for another memory device. The processor receives a signal indicating that a number of errors have been detected. In response, it reads an error count corresponding to each of multiple memory rows of the memory device. The processor determines a first memory row based on the error counts and a second memory row based on access data characterizing memory accesses. It then writes data stored at the first memory row to the second memory row and disables the first memory row.

Another significant patent is "Partial row refresh in a memory device." This disclosure provides systems, methods, and devices for memory systems that support partial row refresh operations. The method includes obtaining partial row refresh information associated with a first row in a memory array and refreshing a portion of that first row based on the obtained information.

Career Highlights

Sri Ananda Sai Jannabhatla is currently employed at Qualcomm Incorporated, a leading technology company known for its innovations in telecommunications and semiconductor technology. His work at Qualcomm has allowed him to explore advanced memory systems and contribute to cutting-edge technologies.

Collaborations

He has collaborated with talented coworkers such as Subham Panda and Muzaffaruddin Mohammed, enhancing the innovative environment at Qualcomm.

Conclusion

Sri Ananda Sai Jannabhatla's contributions to memory data integrity and performance enhancement are noteworthy. His patents reflect a commitment to advancing technology in the field of memory systems. His work continues to influence the industry and inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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