Sireesha Molakalapalli

Title: Sireesha Molakalapalli: Innovator in Static Timing Analysis

Introduction

Sireesha Molakalapalli is a prominent inventor based in San Jose, CA (US). She has made significant contributions to the field of integrated circuit design, particularly in the area of static timing analysis. With a total of two patents to her name, her work focuses on improving the accuracy and efficiency of timing analysis in circuit designs.

Latest Patents

Sireesha's latest patents include innovative methods for generating design-specific on-chip variation (DS-OCV) de-rating factors. One of her inventions involves executing a static timing analysis (STA) in an on-chip variation mode using a process corner library. This method collects timing information from the top N critical timing paths and executes a statistical static timing analysis (SSTA) on these paths. By comparing the timing results, she derives DS-OCV de-rating factors for clock and data paths, which are essential for accurate timing analysis in the presence of process variations. This approach allows users to specify DS-OCV de-rating factors for specific paths, resulting in a more precise timing analysis report with reduced run-time.

Career Highlights

Sireesha Molakalapalli is currently employed at Cadence Design Systems, Inc., a leading company in electronic design automation. Her expertise in static timing analysis has positioned her as a valuable asset in the field of integrated circuit design.

Collaborations

Throughout her career, Sireesha has collaborated with notable colleagues, including Hongliang Chang and Vassilios Constantinos Gerousis. These collaborations have further enhanced her contributions to the field and have fostered innovation in timing analysis methodologies.

Conclusion

Sireesha Molakalapalli's work in static timing analysis has significantly advanced the understanding and implementation of design-specific on-chip variation de-rating factors. Her patents reflect her commitment to improving the accuracy and efficiency of circuit design analysis. Sireesha continues to be an influential figure in the field of integrated circuits.