Hwaseong, South Korea

Sin Seok Han

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Point Engineering Co., Ltd.. Active years: 2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sin Seok Han. Retrieved from https://idiyas.com/inventor/sin-seok-han

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2017

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1 patent (USPTO):Explore Patents

Title: Sin Seok Han: Innovator in Chip Substrate Technology

Introduction

Sin Seok Han is a notable inventor based in Hwaseong-si, South Korea. He has made significant contributions to the field of chip substrate technology, particularly with his innovative designs that enhance the reliability and cost-effectiveness of chip packaging.

Latest Patents

Sin Seok Han holds a patent for a chip substrate comprising a groove portion and a chip package utilizing this substrate. The invention includes conductive portions laminated in one direction, insulation portions that electrically isolate the conductive portions, and a cavity formed at a predetermined depth. The groove portion is strategically placed outside the cavity to prevent adhesive agents from being exposed to light emitted from optical elements. This design not only enhances the reliability of lens bonding but also allows for the use of less expensive adhesive materials, thus reducing costs.

Career Highlights

Sin Seok Han is associated with Point Engineering Co., Ltd., where he continues to develop innovative solutions in chip substrate technology. His work has been instrumental in advancing the capabilities of chip packaging, making it more efficient and cost-effective.

Collaborations

Sin has collaborated with colleagues such as Soo Young Choi and Ki Myung Nam, contributing to a dynamic team focused on innovation in engineering.

Conclusion

Sin Seok Han's contributions to chip substrate technology exemplify the impact of innovative thinking in engineering. His patent not only addresses technical challenges but also offers economic advantages, showcasing the importance of creativity in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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