Cambridge, MA, United States of America

Silviu Chiricescu

This inventor holds 1 USPTO granted patent. Top assignee: The Charles Stark Draper Laboratory, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Silviu Chiricescu. Retrieved from https://idiyas.com/inventor/silviu-chiricescu-uvb9dn5g

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Silviu Chiricescu and Fault Detection in Program Execution

Introduction

Silviu Chiricescu is an inventor associated with Cambridge, Massachusetts, and The Charles Stark Draper Laboratory, Inc. His patent work addresses detecting faults that can alter the execution of instruction blocks.

Latest Patents

Chiricescu is associated with 1 patent, titled “Detecting Injection of Faults in Program Counters Altering Execution of Basic Blocks of Instructions.” The invention describes a processor that assigns ordered tags to instructions in a block and compares the expected tag with the tag associated with the instruction identified by the program counter. If the tags do not match, the processor detects a potential program-counter fault. This approach is designed to identify execution errors that could disrupt a program’s intended sequence.

Career Highlights

Chiricescu’s listed patent is connected with his work at The Charles Stark Draper Laboratory, Inc., a research and engineering organization. The invention reflects a focus on processor reliability and methods for detecting faults during program execution.

Collaborations

The patent’s association with The Charles Stark Draper Laboratory, Inc. indicates a connection between Chiricescu’s inventive work and the organization’s research and engineering activities. The provided information does not identify additional collaborators.

Conclusion

Silviu Chiricescu’s patent describes a tag-based method for detecting program-counter faults, contributing to efforts to improve the reliability of instruction execution.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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