Shye-Lin Wu

Title: Shye-Lin Wu’s Semiconductor Device Innovations.

Introduction

Shye-Lin Wu is an inventor associated with semiconductor device research and patents in Nantou, Taiwan. Her work includes techniques for improving EEPROM tunnel oxides and fabricating polysilicon-emitter p-n junction diodes. She is associated with the National Science Council and has 2 patents listed in the provided information.

Latest Patents

Method of Fabricating a Textured Tunnel Oxide for EEPROM Applications. This invention describes forming a thin, textured tunnel oxide by thermally oxidizing a thin polysilicon film on a silicon substrate. Oxygen diffuses through grain boundaries into the substrate, producing a textured silicon/silicon dioxide interface. The resulting localized high electric fields support a higher electron injection rate, while EEPROM cells using the structure exhibit lower electron trapping and reduced interface-state generation under high-field operation.

Stacked-Layer Structure Polysilicon Emitter Contacted P-N Junction Diode. This process forms a diode by stacking n-type polysilicon layers on a p-type silicon substrate. The resulting junction is described as having a thickness of 0.05–0.2 micrometers. The patent reports low reverse-bias leakage, a breakdown voltage greater than 100 volts in magnitude, and a forward-bias ideality factor close to unity.

Career Highlights

Wu’s listed patents address semiconductor fabrication and device performance. One focuses on improving charge injection and reliability in EEPROM memory cells, while the other describes a diode structure with favorable electrical characteristics.

Collaborations

The provided information names Chung-Len Lee and Tan-Fu Lei as Wu’s coworkers. It does not specify their roles in the listed patents.

Conclusion

Shye-Lin Wu’s patent work reflects contributions to semiconductor technology, particularly textured tunnel oxides for EEPROM applications and stacked-layer polysilicon-emitter diodes.