Machida, Japan

Shigeru Mukasa

This inventor holds 1 USPTO granted patent. Top assignee: Fujitsu Corporation. Active years: 1986.


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 1986

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1 patent (USPTO):Explore Patents

Title: Shigeru Mukasa: Innovator in Error Correction Technology

Introduction

Shigeru Mukasa is a notable inventor based in Machida, Japan. He has made significant contributions to the field of error correction technology. His innovative work has led to the development of a unique system that enhances data integrity and reliability.

Latest Patents

Shigeru Mukasa holds a patent for an "Error correcting and detecting system." This system utilizes a parity check H-matrix that is divided into multiple block vectors. Each block vector consists of either three or four column vectors, each containing eight elements. The H-matrix is designed with specific criteria to ensure effective error detection and correction.

Career Highlights

Mukasa is currently employed at Fujitsu Corporation, where he continues to advance his research and development efforts. His work at Fujitsu has allowed him to collaborate with other talented professionals in the field.

Collaborations

Some of his notable coworkers include Takashi Ibi and Moriyuki Takamura. Their combined expertise contributes to the innovative projects at Fujitsu Corporation.

Conclusion

Shigeru Mukasa's contributions to error correction technology exemplify the importance of innovation in enhancing data reliability. His work continues to influence the field and inspire future advancements.

Profile summary based on public USPTO records.
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