Ottawa, Canada

Sherri Lynn Griffin

This inventor holds 1 USPTO granted patent, plus 1 CIPO patent. Top assignee: Chipworks Inc.. Active years: 2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sherri Lynn Griffin. Retrieved from https://idiyas.com/inventor/sherri-lynn-griffin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile



Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2009

Loading Chart...
Loading Chart...
1 patent (USPTO):Explore Patents

Title: Sherri Lynn Griffin: Innovator in Integrated Circuit Technology

Introduction

Sherri Lynn Griffin is a notable inventor based in Ottawa, Canada. She has made significant contributions to the field of integrated circuit technology, particularly through her innovative patent.

Latest Patents

Sherri holds a patent for a "Method of preparing an integrated circuit die for imaging." This method involves completely etching away all metal from the metal lines without removing the underlying barrier layers. The process also allows for the removal of metal vias, especially when they are made from the same material as the metal lines, such as in copper damascene circuits. This technique results in high contrast images, enabling circuit layout extraction software to easily differentiate between metal lines and vias.

Career Highlights

Sherri is currently employed at Chipworks Inc., where she applies her expertise in integrated circuit technology. Her work has been instrumental in advancing imaging techniques within the industry.

Collaborations

Sherri collaborates with Lev Klibanov, a fellow professional in her field. Their partnership contributes to the innovative projects at Chipworks Inc.

Conclusion

Sherri Lynn Griffin's contributions to integrated circuit technology through her patent demonstrate her role as a leading inventor in her field. Her work continues to influence advancements in imaging techniques for integrated circuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…