Daegu, South Korea

Seung-yeob Paek

This inventor holds 1 USPTO granted patent. Top assignee: Samsung Electronics Co., Ltd.. Active years: 1992.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Seung-yeob Paek. Retrieved from https://idiyas.com/inventor/seung-yeob-paek

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 25(Granted Patents)


Company Filing History:


Years Active: 1992

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1 patent (USPTO):Explore Patents

Title: Seung-yeob Paek: Innovator in Neural Network Technology

Introduction

Seung-yeob Paek is a prominent inventor based in Taegu, South Korea. He has made significant contributions to the field of technology, particularly in the development of advanced circuits. His innovative work focuses on enhancing the efficiency and speed of computational processes.

Latest Patents

One of Seung-yeob Paek's notable patents is a floating point adder circuit using neural network concepts. This invention allows for high-speed operation through a controlling circuit that utilizes a comparator, along with an operating circuit that incorporates both an adder and a subtractor. This patent showcases his expertise in integrating neural network principles into practical applications.

Career Highlights

Seung-yeob Paek is currently employed at Samsung Electronics Co., Ltd., a leading global technology company. His role at Samsung has enabled him to work on cutting-edge projects that push the boundaries of electronic design and innovation.

Collaborations

He collaborates with talented individuals in his field, including his coworker Ho-Sun Chung. Their partnership exemplifies the collaborative spirit that drives innovation in technology.

Conclusion

Seung-yeob Paek's contributions to the field of neural networks and circuit design highlight his role as a key innovator in technology. His work continues to influence advancements in electronic systems and computational efficiency.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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