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For the Inventor, By the Inventor

Plascassier, France

Serge Bernard Lasserre

This inventor holds 51 USPTO granted patents and 1 published patent application and 18 EPO patents, primarily in Cache Management (CPC class G06F). Top assignee: Texas Instruments Corporation. Active years: 2001-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Serge Bernard Lasserre. Retrieved from https://idiyas.com/inventor/serge-bernard-lasserre

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 51 

% Patents Active = 96.1


Average Co-Inventor Count = 2.9

ph-index = 13

Forward Citations = 766(Granted Patents)

Forward Citations (Not Self Cited) = 757(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • St. Jean de Cannes, FR (2005)
  • Grasse-Plascassier, FR (2005)
  • Frejus, FR (2001 - 2013)
  • Plascassier, FR (2006 - 2015)

Company Filing History:

goldMedal51 out of 29,888 
 
Texas Instruments Corporation
 patents

Years Active: 2001-2015

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Areas of Expertise:
Cache Management
Memory Hierarchy
Multi-Processor Systems
Dynamic Priority Leads
Data Processing
Smart Cache
Stack-Based Memory
Garbage Collection
Inter-Processor Control
Memory Allocation
Traffic Controller
Fault Management
51 patents (USPTO):Explore Patents
1. 9141561 - Master circuits having dynamic priority leads coupled with memory controller (2015-09-22),
2. 8539159 - Dirty cache line write back policy based on stack size trend information (2013-09-17),
3. 8429383 - Multi-processor computing system having a JAVA stack machine and a RISC-based processor (2013-04-23),
4. 8190861 - Micro-sequence based security model (2012-05-29),
5. 8156283 - Processing function connected to processor memory hierarchy (2012-04-10),
6. 8032891 - Energy-aware scheduling of application execution (2011-10-04),
7. 7941790 - Data processing apparatus, system and method (2011-05-10),
8. 7840784 - Test and skip processor instruction having at least one register operand (2010-11-23),
9. 7840782 - Mixed stack-based RISC processor (2010-11-23),
10. 7757067 - Pre-decoding bytecode prefixes selectively incrementing stack machine program counter (2010-07-13),
11. 7712098 - Data transfer controlled by task attributes (2010-05-04),
12. 7634643 - Stack register reference control bit in source operand of instruction (2009-12-15),
13. 7565385 - Embedded garbage collection (2009-07-21),
14. 7555611 - Memory management of local variables upon a change of context (2009-06-30),
15. 7509391 - Unified memory management system for multi processor heterogeneous architecture (2009-03-24),

Title: Serge Bernard Lasserre: Pioneering Innovator in the World of Inventors

Introduction:

Serge Bernard Lasserre, hailing from Plascassier, France, is a trailblazing inventor whose passion for innovation has propelled him to the forefront of the inventor community. With an impressive portfolio of 51 patents, Lasserre's unwavering commitment to excellence has not only significantly impacted the field of inventing but has also inspired countless future innovators.

Latest Patents:

Among his latest patents is a groundbreaking system titled "Master Circuits Having Dynamic Priority Leads Coupled with Memory Controller." This innovation revolutionizes memory access by allowing master devices to signal the memory refresh scheduler to alter its policy for issuing refresh commands, offering unparalleled efficiency and performance enhancements. Another notable patent is "Dirty Cache Line Write Back Policy Based on Stack Size Trend Information," which optimizes memory write back by analyzing stack trend information to reduce data traffic between memory levels, showcasing Lasserre's ingenuity and forward-thinking approach.

Career Highlights:

Serge Bernard Lasserre's illustrious career is deeply intertwined with Texas Instruments Corporation, a renowned technology company. His remarkable contributions to the organization have cemented his reputation as a visionary inventor who consistently pushes the boundaries of what is achievable in the realm of technology. Lasserre's innovative spirit and dedication to excellence are evident in the myriad patents he has successfully brought to fruition throughout his career.

Collaborations:

Throughout his career, Serge Bernard Lasserre has collaborated with esteemed colleagues such as Gerard Chauvel and Dominique D'Inverno. These partnerships have not only facilitated the exchange of ideas and expertise but have also resulted in the development of cutting-edge technologies that have significantly impacted the field of inventing. Lasserre's ability to collaborate effectively with his peers underscores his commitment to driving innovation through collaboration and knowledge-sharing.

Conclusion:

In conclusion, Serge Bernard Lasserre's remarkable journey as an inventor epitomizes the transformative power of innovation and perseverance. His pioneering spirit, coupled with his relentless pursuit of excellence, has established him as a prominent figure in the world of inventors, inspiring future generations to push the boundaries of what is possible. Lasserre's innovative contributions continue to shape the landscape of technology and serve as a beacon of inspiration for aspiring inventors around the globe.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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