Sunnyvale, CA, United States of America

Seowoo Nam

This inventor holds 1 USPTO granted patent. Top assignee: Applied Materials, Inc.. Active years: 2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Seowoo Nam. Retrieved from https://idiyas.com/inventor/seowoo-nam-alnoirkd

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2003

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1 patent (USPTO):Explore Patents

Title: Seowoo Nam: Innovator in Integrated Circuit Fabrication

Introduction

Seowoo Nam is a notable inventor based in Sunnyvale, CA, specializing in methods for fabricating gates in integrated circuit device structures. His innovative approach has contributed significantly to advancements in semiconductor technology.

Latest Patents

Seowoo Nam holds 1 patent for his work titled "Methods used in fabricating gates in integrated circuit device structures." This patent describes a method for fabricating a device on a substrate, which includes a metal gate stack formed over a gate oxide. The method involves etching a refractory metal layer and stopping on or in a refractory metal barrier/adhesion layer, followed by etching the barrier/adhesion layer using a passivation etching chemistry without oxygen.

Career Highlights

Seowoo Nam is currently employed at Applied Materials, Inc., a leading company in the field of materials engineering. His work at Applied Materials has allowed him to push the boundaries of integrated circuit fabrication techniques.

Collaborations

Throughout his career, Seowoo has collaborated with talented individuals such as Sang In Yi and Kenlin Huang, contributing to various projects and innovations in the semiconductor industry.

Conclusion

Seowoo Nam's contributions to integrated circuit fabrication highlight his role as an innovator in the field. His patent and work at Applied Materials, Inc. demonstrate his commitment to advancing technology in semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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