San Diego, CA, United States of America

Seongho Kim

This inventor holds 1 USPTO granted patent and 5 published patent applications. Top assignee: Qualcomm Incorporated. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Seongho Kim. Retrieved from https://idiyas.com/inventor/seongho-kim-anlxh24i

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Seongho Kim and Semiconductor Packaging Innovation.

Introduction

Seongho Kim is an inventor associated with Qualcomm Incorporated in San Diego, California. His patent work concerns integrated-device packaging and the connection of memory-related components within a semiconductor package.

Latest Patents

The provided information identifies one patent associated with Kim: “Integrated Device Including Direct Memory Attachment on Through Mold Conductors.” The invention describes an integrated device with a die containing active circuitry, a substrate with contacts on both sides, and mold compound that at least partially encapsulates the die. Through-mold conductors connect to substrate contacts and extend through the mold compound. The design places the upper surfaces of the mold compound, die, and conductors in a coplanar arrangement. Kim is credited with 1 patent in the information provided.

Career Highlights

Kim’s listed patent reflects work on semiconductor integration and packaging, particularly the arrangement of through-mold conductors alongside a die and substrate. The supplied information associates him with Qualcomm Incorporated.

Collaborations

The provided data names Zhijie Wang and Rajneesh Kumar as Kim’s coworkers. Their inclusion indicates professional connections, but no specific joint patent or collaboration details were supplied.

Conclusion

Seongho Kim’s documented invention addresses integrated-device packaging through a coplanar arrangement of a die, mold compound, and through-mold conductors, highlighting a focused contribution to semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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