This inventor holds 1 USPTO granted patent. Top assignee: Silicon Graphics, Incorporated. Active years: 1998.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1998
Title: Scott W Alvarez: Innovator in Digital Delay-Locked Loops
Introduction
Scott W Alvarez is a notable inventor based in Raleigh, NC (US). He has made significant contributions to the field of digital electronics, particularly in the area of delay-locked loops. His innovative approach has led to the development of a unique system that addresses common challenges in digital signal processing.
Latest Patents
Scott W Alvarez holds a patent for a "System and method to reduce jitter in digital delay-locked loops." This invention incorporates a variable delay circuit designed to add delay to a clock signal. In a preferred embodiment, the delay is determined and fixed by a circuit employing the concept of a lock-and-leave circuit. This design fine-tunes the delay established by the lock-and-leave circuit. Mode bits allow users to control the rate of fine-tuning, with three update rates provided: slow, medium, and fast. He has 1 patent to his name.
Career Highlights
Scott W Alvarez is currently associated with Silicon Graphics, Incorporated, where he applies his expertise in digital electronics. His work has been instrumental in advancing technologies that enhance the performance of digital systems.
Collaborations
Throughout his career, Scott has collaborated with talented individuals such as David P Chengson and Hansel A Collins. These partnerships have fostered innovation and contributed to the success of various projects.
Conclusion
Scott W Alvarez is a distinguished inventor whose work in digital delay-locked loops has made a significant impact in the field of electronics. His innovative solutions continue to influence advancements in digital signal processing.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile