This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Renesas Electronics Corporation. Active years: 2012-2013.
Location History:
- Tokyo, JP (2012)
- Kanagawa, JP (2013)
Company Filing History:
Years Active: 2012-2013
Title: Innovations of Satoshi Shibatani
Introduction
Satoshi Shibatani is a notable inventor based in Kanagawa, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His work focuses on optimizing power domains and improving the efficiency of integrated circuit design.
Latest Patents
One of his latest patents is titled "Obtaining power domain by clustering logical blocks based on activation timings." This innovation allows for the automatic generation of a power domain through a computer-based clustering process. The method evaluates whether a designed circuit meets specifications and optimizes the power domain compared to manual methods.
Another significant patent is the "Method of semiconductor integrated circuit device using library for estimating timing/area to place cells." This invention aims to reduce layout changes after timing optimization, thereby shortening the layout design period. By estimating timing and area in advance, the method ensures that cells are placed optimally to meet timing constraints while avoiding wiring congestion.
Career Highlights
Satoshi Shibatani is currently employed at Renesas Electronics Corporation, where he continues to innovate in semiconductor technology. His work has had a profound impact on the efficiency and effectiveness of circuit design processes.
Collaborations
He collaborates with talented coworkers such as Kenta Suto and Ryoji Ishikawa, contributing to a dynamic and innovative work environment.
Conclusion
Satoshi Shibatani's contributions to semiconductor technology through his patents demonstrate his commitment to innovation and efficiency in circuit design. His work continues to influence the industry positively.
