Suwon, South Korea

Sang-Woon Lee

This inventor holds 1 USPTO granted patent. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sang-Woon Lee. Retrieved from https://idiyas.com/inventor/sang-woon-lee-33f52qus

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Sang-Woon Lee and Semiconductor Memory Innovation

Introduction

Sang-Woon Lee is an inventor associated with Suwon, South Korea, and Samsung Electronics Ltd. His patent work includes a semiconductor memory device designed with a layered arrangement of gates, insulating patterns, and active components. The available information lists 1 patent for him.

Latest Patents

Lee’s listed patent, “Semiconductor Memory Device,” describes a substrate with a bit line and spaced word lines. A back gate electrode is positioned between adjacent word lines, with active patterns between the electrode and the word lines and contact patterns placed on the active patterns.

The design also includes insulating patterns around the back gate electrode. Its upper and lower insulating materials have different dielectric constants, with the lower insulating material having the higher dielectric constant. This arrangement reflects an approach to structuring semiconductor memory components and their electrical insulation.

Career Highlights

Lee’s listed invention concerns semiconductor memory architecture, an area relevant to the design and fabrication of electronic memory devices. His association with Samsung Electronics Ltd. connects his patent work to a company active in the electronics industry.

Collaborations

Sangho Lee is identified as Lee’s coworker. The available information does not specify whether they collaborated on the listed patent or on other projects.

Conclusion

Sang-Woon Lee’s listed patent documents a semiconductor memory device with a carefully arranged back gate and insulating layers, highlighting his contribution to memory-device innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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