Suwon, South Korea

Sang Hoon Min

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sang Hoon Min. Retrieved from https://idiyas.com/inventor/sang-hoon-min

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Sang Hoon Min - Innovator in Semiconductor Memory Devices

Introduction

Sang Hoon Min is an inventor based in Suwon-si, South Korea. He has made significant contributions to the field of semiconductor technology, particularly in the development of semiconductor memory devices. His innovative approach focuses on enhancing the efficiency and functionality of memory devices.

Latest Patent Applications

Sang Hoon Min has filed a patent application for a semiconductor memory device. This device comprises a substrate that includes a cell region with an active region defined by a cell element isolation layer, a peripheral region near the cell region, and a boundary region between the cell region and the peripheral region. The device features a word line structure in the substrate extending in a first direction, and a bit line structure on the substrate that extends from the cell region to the boundary region in a second direction, which crosses the first direction. This structure includes first and second cell conductive layers that are sequentially stacked on the substrate, along with a bit line contact that connects the substrate with the bit line structure. Notably, the second cell conductive layer in the boundary region is thicker than that in the cell region.

Conclusion

Sang Hoon Min's work in semiconductor memory devices showcases his innovative spirit and dedication to advancing technology in this field. His contributions, although currently in the application stage, hold promise for future developments in semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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