San Y Han

Title: Innovations of San Y Han in Integrated Circuit Design

Introduction

San Y Han is an accomplished inventor based in Poughkeepsie, NY (US). He has made significant contributions to the field of integrated circuit design, particularly through his innovative methods that optimize the design process. His work has been recognized for its efficiency and effectiveness in reducing computational resource consumption.

Latest Patents

San Y Han holds a patent for a method known as Timing Driven Placement. This invention focuses on designing integrated circuits by optimizing the steps involved in the design process through a formal hierarchy. The Timing Driven Placement method avoids detailed optimization, which typically requires substantial computational resources. Instead, it organizes the physical and logical characteristics of the design to enhance optimization concerning the circuit's physical design. The method effectively optimizes global placement into precincts of logic segments, improving both individual segment and overall circuit timing and wireability.

Career Highlights

San Y Han is currently employed at International Business Machines Corporation (IBM), where he continues to apply his expertise in integrated circuit design. His innovative approach has contributed to advancements in the field, making him a valuable asset to his team and the company.

Collaborations

Throughout his career, San Y Han has collaborated with notable colleagues, including Bhuwan Agrawal and Stephen E Bello. These collaborations have further enriched his work and contributed to the development of innovative solutions in integrated circuit design.

Conclusion

San Y Han's contributions to integrated circuit design through his Timing Driven Placement patent exemplify his innovative spirit and dedication to advancing technology. His work not only enhances the efficiency of circuit design but also sets a benchmark for future innovations in the field.