San Jose, CA, United States of America

Rosario J Consiglio

This inventor holds 11 USPTO granted patents. Top assignees: Lsi Logic Corporation, Maxim Integrated Products, Inc., Vlsi Technology, Inc.. Active years: 1995-1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rosario J Consiglio. Retrieved from https://idiyas.com/inventor/rosario-j-consiglio

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 8

Forward Citations = 143(Granted Patents)


Company Filing History:


Years Active: 1995-1998

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11 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Rosario J Consiglio

Introduction

Rosario J Consiglio is a notable inventor based in San Jose, CA, with a remarkable portfolio of 11 patents. His work primarily focuses on enhancing electrostatic discharge (ESD) protection in integrated circuits, showcasing his expertise in semiconductor technology.

Latest Patents

One of his latest patents is the "Process tolerant NMOS transistor for electrostatic discharge protection." This invention presents an improved ESD cell capable of providing a minimum of 2,000 volts HBM ESD protection. The design utilizes an NMOS transistor with its source connected to ground and its drain linked through a polysilicon resistor to an integrated circuit pad. This innovative approach allows the parasitic transistor to activate at the right moment, significantly increasing ESD protection. The expected range of HBM ESD values can reach between 2,500 volts and 3,000 volts, depending on process variations.

Another significant patent is the "Integrated circuit input/output ESD protection circuit with gate voltage." This integrated circuit structure features input/output gate voltage regulation and parasitic zener and junction diodes to protect against damage from ESD events. The circuit includes a protective FET connected between an input/output pad and the ground potential of the integrated circuit, ensuring robust protection during ESD occurrences.

Career Highlights

Throughout his career, Rosario has worked with prominent companies such as LSI Logic Corporation and VLSI Technology, Inc. His contributions to these organizations have been instrumental in advancing ESD protection technologies.

Collaborations

Rosario has collaborated with talented individuals in the field, including Gina M Sparacino and Yen-Hui Joseph Ku. These partnerships have fostered innovation and development in semiconductor technologies.

Conclusion

Rosario J Consiglio's innovative work in ESD protection has significantly impacted the field of integrated circuits. His patents reflect a deep understanding of semiconductor technology and a commitment to enhancing device reliability.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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