Somerville, MA, United States of America

Ronald W Choi

This inventor holds 1 USPTO granted patent. Top assignee: Cypress Semiconductor Corporation. Active years: 2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ronald W Choi. Retrieved from https://idiyas.com/inventor/ronald-w-choi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2006

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1 patent (USPTO):Explore Patents

Title: Ronald W. Choi and Mask Revision ID Code Circuit.

Introduction

Ronald W. Choi is an inventor associated with Somerville, Massachusetts, and Cypress Semiconductor Corporation. His patent work includes a circuit for identifying mask revisions in semiconductor devices.

Latest Patents

Choi is credited with 1 patent, titled “Mask Revision ID Code Circuit.” The invention describes a mask identification bit circuit that supplies one of two potentials, VGND or VPWR, to a sense node. It uses links arranged in series, with each link configurable either for direct connections or cross-coupled connections between its inputs and outputs. Cross-coupling can switch the potential supplied to the sense node, and changing the configurations of multiple links allows the potential to switch more than once. The patent explains that n mask ID bit circuits can provide as many as 2ⁿ distinct mask identification codes.

Career Highlights

Choi’s documented patent contribution addresses semiconductor mask identification, enabling circuits to encode revision information through configurable electrical connections. His work is associated with Cypress Semiconductor Corporation.

Collaborations

The provided information identifies Robert M. Reinschmidt as Choi’s coworker. It does not specify their roles or describe a particular joint project.

Conclusion

Ronald W. Choi’s patent describes a configurable circuit for encoding mask revision information by switching a sense node between two voltage potentials.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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