This inventor holds 1 USPTO granted patent. Top assignee: International Business Machines Corporation. Active years: 1997.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1997
Title: Rohit Kapur: A Pioneer in Digital Integrated Circuit Design
Introduction
Rohit Kapur, a talented inventor based in Foster City, California, has made significant contributions to the field of digital integrated circuit design. With a focus on enhancing testability without the overhead of full-scan methods, Kapur's innovations have set a new standard in the industry.
Latest Patents
Kapur holds a patent for the "Hybrid Partial Scan Method," which is an efficient approach for selecting flip-flops to be made scannable within digital integrated circuits. This inventive method encompasses several critical steps that include partitioning circuit faults, selecting a characterization algorithm, and generating test data, all aimed at improving testability effectively.
Career Highlights
Currently, Rohit Kapur is associated with the International Business Machines Corporation (IBM), where he has been applying his expertise to further develop cutting-edge technologies in digital circuit design. His inventive solutions have positioned him as a key figure in his field, driving forward the possibilities for robust and efficient circuit testing.
Collaborations
Throughout his career, Kapur has collaborated with notable colleagues such as Thomas James Snethen and Kamran K Zarrineh. These partnerships have facilitated innovative discussions and led to advancements in methodologies surrounding circuit design and testability techniques.
Conclusion
Rohit Kapur is an exemplary inventor whose work on the Hybrid Partial Scan Method not only enhances the functionality of digital integrated circuits but also showcases his dedication to innovation in engineering practices. As a professional at IBM, his contributions continue to influence the field and pave the way for future advancements in integrated circuit design.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
