San Jose, CA, United States of America

Richard Jiang Li

This inventor holds 1 USPTO granted patent. Top assignee: Cisco Technology, Inc.. Active years: 2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Richard Jiang Li. Retrieved from https://idiyas.com/inventor/richard-jiang-li

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2021

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1 patent (USPTO):Explore Patents

Title: Richard Jiang Li and Memory-System Design

Introduction

Richard Jiang Li is an inventor based in San Jose, California. His patent work includes a printed circuit board design for arranging and connecting memory modules across two processor sockets.

Latest Patents

The provided information lists 1 patent for Li: “Multi-column interleaved DIMM placement and routing topology.” The invention describes a PCB with two CPU sockets and corresponding groups of dual in-line memory module (DIMM) sockets. The sockets are arranged across multiple columns, with one column interleaving DIMM sockets connected to each CPU. This layout addresses the placement and routing of memory modules on a board.

Career Highlights

Li is associated with Cisco Technology, Inc. His listed patent reflects work on computer hardware architecture, particularly the organization and interconnection of processor and memory sockets.

Collaborations

Hoi San Leung and Minh-Thanh T Vo are identified as Li’s coworkers. The available information does not specify their roles in the patent or whether they collaborated on it.

Conclusion

Richard Jiang Li’s listed invention focuses on an interleaved DIMM placement and routing topology designed for a dual-CPU printed circuit board.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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