Phoenix, AZ, United States of America

Richard J Banach

This inventor holds 1 USPTO granted patent. Top assignee: Honeywell Information Systems Inc.. Active years: 1983.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Richard J Banach. Retrieved from https://idiyas.com/inventor/richard-j-banach

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 81(Granted Patents)


Company Filing History:


Years Active: 1983

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1 patent (USPTO):Explore Patents

Title: Richard J Banach: Innovator in Integrated Circuit Technology

Introduction

Richard J Banach is a notable inventor based in Phoenix, AZ (US). He has made significant contributions to the field of integrated circuit technology. His innovative approach has led to the development of a unique patent that enhances the performance of integrated circuit packages.

Latest Patents

Richard J Banach holds a patent for an "Integrated circuit chip package with improved cooling means." This invention features an integrated circuit package where the chip is mounted active face down on a substrate. The design includes a heat sink pad positioned opposite the chip pad, with thermal passages filled with a thermally conductive material. This configuration provides a low impedance thermal path between the integrated circuit chip and the heat sink, ensuring efficient cooling.

Career Highlights

Richard J Banach is associated with Honeywell Information Systems Inc., where he has applied his expertise in integrated circuit technology. His work has contributed to advancements in the efficiency and reliability of electronic devices.

Collaborations

Richard has collaborated with Chandler H McIver, further enhancing the innovative efforts within their field.

Conclusion

Richard J Banach's contributions to integrated circuit technology exemplify the impact of innovation in electronics. His patent reflects a commitment to improving the performance and reliability of integrated circuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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