Company Filing History:
Years Active: 1989
Title: Innovations by Rathindra N Putatunda
Introduction
Rathindra N Putatunda is a notable inventor based in Marlton, NJ (US). He has made significant contributions to the field of chip layout systems, holding two patents that showcase his innovative approach to design and efficiency.
Latest Patents
His latest patents include a "Structured design method for high density standard cell and macrocell" and a "Structured design method for generating a mesh power bus structure." The first patent describes a chip layout system that organizes standard cells and macrocells into binary pairs, optimizing placement based on area and interconnect length. The second patent focuses on an automated layout for power bus distribution, ensuring a low-resistance network while minimizing chip size.
Career Highlights
Rathindra N Putatunda is currently employed at General Electric Company, where he continues to develop innovative solutions in chip design. His work has had a significant impact on the efficiency and effectiveness of electronic devices.
Collaborations
He has collaborated with notable coworkers such as David C Smith and Stephen A McNeary, contributing to a dynamic and innovative work environment.
Conclusion
Rathindra N Putatunda's contributions to chip layout systems exemplify the importance of innovation in technology. His patents reflect a commitment to enhancing efficiency and functionality in electronic design.