Capitola, CA, United States of America

Ramin Halaviati

This inventor holds 2 USPTO granted patents. Top assignee: Lsi Logic Corporation. Active years: 1992-1994.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ramin Halaviati. Retrieved from https://idiyas.com/inventor/ramin-halaviati

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 2

Forward Citations = 90(Granted Patents)


Company Filing History:


Years Active: 1992-1994

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2 patents (USPTO):Explore Patents

Title: Innovations by Ramin Halaviati

Introduction

Ramin Halaviati is an accomplished inventor based in Capitola, CA (US). He has made significant contributions to the field of integrated circuit diagnosis, holding 2 patents that showcase his innovative techniques.

Latest Patents

One of his latest patents is titled "Method and apparatus for integrated circuit diagnosis." This invention discloses a technique for pinpointing and analyzing failures in complex integrated circuits. A tester stimulates a device under test (DUT) with input patterns, and the DUT output patterns are communicated back to the tester for comparison with simulation results. Failing outputs are identified, and working back from these outputs, suspect failing nodes are identified in a schematic editor. The position of each suspect failing node is determined through a layout database linked to the schematic editor. A probe and scanning electron microscope (SEM) are positioned at nodes suspected of causing the failure. Live waveforms generated by the probe are compared with simulated waveforms while the DUT is re-exercised by the tester. The user is provided with a comprehensive display that includes schematic, layout, SEM image, and live and simulated waveforms for the suspect node. This process continues until the failing circuit element is identified, with documentation provided by printing any and all of the windows.

Another notable patent is "Detection of semiconductor failures by photoemission and electron beam." This technique also focuses on analyzing failures in complex integrated circuits. In this method, the DUT is powered up, and leakage sites are identified using Liquid Crystal (LC) or Photo-Emission (PE) techniques. These leakage sites are associated with suspect circuit elements on the DUT, and candidate I/Os linked to the suspect failing elements are selected for further testing. A truncated set of test vectors is created and applied to the DUT while it runs. The suspect elements are rigorously probed to identify failing elements, with SEM images viewed simultaneously. This method results in a log of failing elements that can inform circuit or process redesign.

Career Highlights

Ramin Halaviati is currently employed at LSI Logic Corporation, where he continues to innovate in the field of integrated circuits. His work has had a significant impact on the industry, particularly in diagnosing and addressing failures in complex systems.

Collaborations

Ramin has collaborated with notable coworkers such as Sudhakar R Gouravaram and Nanjunda

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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