Austin, TX, United States of America

Rajesh R Kini

This inventor holds 1 USPTO granted patent. Top assignee: Freescale Semiconductor,inc.. Active years: 2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rajesh R Kini. Retrieved from https://idiyas.com/inventor/rajesh-r-kini

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2012

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1 patent (USPTO):Explore Patents

Title: The Innovations of Rajesh R Kini

Introduction

Rajesh R Kini is an accomplished inventor based in Austin, TX. He has made significant contributions to the field of integrated circuits, showcasing his expertise through his innovative patent.

Latest Patents

Rajesh holds a patent for an "Integrated circuit having an array supply voltage control circuit." This integrated circuit comprises a plurality of memory cells organized in rows and columns. Each row includes a word line connected to all memory cells, while each column consists of a bit line pair linked to the memory cells. The array supply voltage control circuit is designed to receive a power supply voltage and provide a reduced power supply voltage to the memory cells of a selected column during a write operation, responding to a voltage differential on the bit line pair of that column.

Career Highlights

Rajesh is currently employed at Freescale Semiconductor, Inc., where he continues to develop innovative technologies. His work has had a lasting impact on the efficiency and performance of integrated circuits.

Collaborations

Rajesh has collaborated with notable colleagues, including Bikas Maiti and Tam Minh Tran, contributing to various projects and advancements in their field.

Conclusion

Rajesh R Kini's contributions to integrated circuit technology exemplify his innovative spirit and dedication to advancing the field. His patent reflects a significant step forward in memory cell technology, showcasing his expertise and commitment to innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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