Rajesh Jagannathan

Title: Rajesh Jagannathan: Network Data Structures and Memory-Efficient Lookup

Introduction

Rajesh Jagannathan is an inventor based in Oakland, California, whose patent work addresses efficient data organization and lookup in networking systems. He is associated with Telefonaktiebolaget LM Ericsson (publ) and is credited with 2 patents.

Latest Patents

Jagannathan’s listed patents focus on organizing network data structures to improve memory use and lookup performance.

“Bank Aware Multi-Bit Trie” describes a method for distributing multi-bit trie (mtrie) blocks across memory banks. The control module identifies available banks and stores each block’s nodes together in one bank. It places blocks at each subsequent trie level in banks different from those used for the immediately preceding level, helping manage how the structure is laid out in memory.

“Hash Collision Resolution with Key Compression in a MAC Forwarding Data Structure” describes a method for looking up a MAC address and interface identifier pair in a network element. It uses compressed keys to index second-tier data structures, selecting address bit positions that uniquely identify entries within each structure. The patent describes a design intended to make lookup cost deterministic and O(1).

Career Highlights

Jagannathan’s patent portfolio reflects work on networking systems, including memory-bank-aware trie organization and compressed-key techniques for MAC forwarding. Both inventions address the design of data structures used to locate network information efficiently.

Collaborations

His listed coworkers include Brian Alleyne and Ramanathan Lakshmikanthan. The patent records connect Jagannathan’s work with Telefonaktiebolaget LM Ericsson (publ).

Conclusion

Rajesh Jagannathan’s two patents highlight approaches to organizing network data for efficient storage and lookup, spanning multi-bit tries and MAC forwarding structures.