Raghuveer Shivaraj

Title: Innovations by Raghuveer Shivaraj

Introduction

Raghuveer Shivaraj is an accomplished inventor based in San Jose, California. He has made significant contributions to the field of electronic systems, holding two patents that showcase his innovative approach to technology.

Latest Patents

His latest patents include "System and methods for latency reduction for fuse reload post reset." This invention proposes a new approach that contemplates systems and methods to support post-reset fuse reload for latency reduction. The process involves reading values of fuses once and storing them in protected load registers. A valid indicator is set to confirm successful loading, allowing other components to access these values efficiently. If the valid indicator is not set, the values are reloaded from the fuses.

Another notable patent is "System and methods for IJTAG reduced access time in a hierarchical design." This system features a test access port (TAP) that provides internal joint test action group (IJTAG) access to multiple test data registries (TDR). Each hierarchical electronic component includes a de-asserted segment inserted bit (D-SIB) register and an asserted segment inserted bit (A-SIB) register, which work together to manage access during reset signals.

Career Highlights

Raghuveer Shivaraj is currently employed at Marvell Asia Pte., Ltd., where he continues to develop innovative solutions in electronic design. His work has significantly impacted the efficiency and performance of electronic systems.

Collaborations

He collaborates with talented coworkers, including Ramacharan Sundararaman and Nithyananda Miyar, who contribute to the innovative environment at Marvell.

Conclusion

Raghuveer Shivaraj's contributions to the field of electronics through his patents demonstrate his commitment to innovation and excellence. His work continues to influence the development of advanced electronic systems.