Campbell, CA, United States of America

Raghu Sastry

This inventor holds 2 USPTO granted patents. Top assignee: University of South Florida. Active years: 1996.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Raghu Sastry. Retrieved from https://idiyas.com/inventor/raghu-sastry-f7vsgiph

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 2

Forward Citations = 20(Granted Patents)


Location History:

  • Campbell, CA (US) (1996)
  • Tampa, FL (US) (1996)

Company Filing History:


Years Active: 1996

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2 patents (USPTO):Explore Patents

Title: Raghu Sastry: Innovator in VLSI Circuit Structures

Introduction

Raghu Sastry is a notable inventor based in Campbell, California. He has made significant contributions to the field of VLSI (Very Large Scale Integration) circuit structures, with a focus on string comparison and polygon recognition. His innovative work has led to the development of two patents that enhance computational efficiency in these areas.

Latest Patents

Raghu Sastry holds 2 patents. His latest patents include a VLSI circuit structure for determining the edit distance between strings. This invention computes the minimum cost of editing operations needed to convert one string into another. The circuit structure is designed for approximate string matching with variable edit costs and does not impose constraints on the lengths of the strings being compared. It utilizes simple basic cells and requires regular nearest-neighbor communication, making it suitable for VLSI implementation.

Another significant patent is for VLSI architectures for polygon recognition. This invention identifies unknown two-dimensional contours as corresponding to known contours. The architecture comprises a systolic processing system with matrix element processing elements (MEPEs) and feasible match processing elements (FMPEs). The MEPEs receive inputs of edge length ratios and threshold values, determining dissimilarity values for pairs of edges. The FMPEs then identify feasible matches, delivering outputs that indicate the longest number of consecutive edges for which matches have occurred.

Career Highlights

Raghu Sastry is affiliated with the University of South Florida, where he continues to contribute to research and innovation in VLSI technology. His work has been instrumental in advancing the capabilities of circuit structures in computational applications.

Collaborations

Raghu collaborates with Nagarajan Ranganathan, enhancing the scope and impact of their research endeavors.

Conclusion

Raghu Sastry's contributions to VLSI circuit structures demonstrate his innovative spirit and commitment to advancing technology. His patents reflect a deep understanding of computational processes and their applications in real-world scenarios.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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