Austin, TX, United States of America

Raghavendar Mysore Rao

This inventor holds 28 USPTO granted patents and 4 EPO patents, primarily in MIMO Communication Systems. Top assignee: Xilinx, Inc.. Active years: 2010-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Raghavendar Mysore Rao. Retrieved from https://idiyas.com/inventor/raghavendar-mysore-rao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 92.9

 

Average Co-Inventor Count = 2.4

ph-index = 7

Forward Citations = 192(Granted Patents)


Company Filing History:


Years Active: 2010-2016

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Areas of Expertise:
Forward Error Correction
MIMO Decoding
Matrix Expansion
Cholesky Decomposition
Peak-to-Average Power Ratio
Systolic Array
Minimum Mean Square Error
Symbol Detection
Wireless Communication
Quadrature-Phase Amplitudes
Bit Optimization
Interference Cancellation
28 patents (USPTO):Explore Patents

Title: **Innovations by Raghavendar Mysore Rao in Forward Error Correction and Matrix Expansion**

Introduction

Raghavendar Mysore Rao, based in Austin, TX, is a prolific inventor with an impressive portfolio of 28 patents. His expertise lies in advanced data processing techniques, particularly in the realms of forward error correction and matrix expansion, which are critical in enhancing communication systems.

Latest Patents

Among his latest innovations, Raghavendar has developed two notable patents that demonstrate his commitment to improving data integrity and transmission efficiency. The first patent focuses on **Forward Error Correction**, detailing methods and circuits for FEC decoding. This involves the reception of symbols in an interleaved format, followed by multiple decoding iterations to identify and correct errors effectively by inverting bits of specific symbols at determined intersections of erroneous rows and columns.

The second patent pertains to **Matrix Expansion**, employing a method utilizing Progressive Edge Growth (PEG) for expanding H matrices. This method involves initializing indexes and performing ACE detection for each variable node, ultimately assisting in the output of information via a parity check matrix.

Career Highlights

Currently, Raghavendar is associated with Xilinx, Inc., a leader in adaptive computing solutions. His role in the company underscores his contributions to the advancement of technologies that underpin modern communication and processing systems.

Collaborations

Throughout his career, Raghavendar has collaborated with esteemed colleagues such as Christopher H. Dick and Raied N. Mazahreh. These collaborations have enriched his work, leading to significant advancements in their fields.

Conclusion

Raghavendar Mysore Rao is a distinguished inventor whose work continues to shape the landscape of data processing and error correction technologies. His innovative patents not only demonstrate his technical prowess but also contribute significantly to the advancement of reliable communication systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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