Shanghai, China

Qiu-Yue Duan

USPTO Granted Patents = 4 

Average Co-Inventor Count = 3.2

ph-index = 1

Forward Citations = 1(Granted Patents)


Location History:

  • Tianjin, CN (2010)
  • Shanghai, CN (2022 - 2024)

Company Filing History:


Years Active: 2010-2025

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4 patents (USPTO):Explore Patents

Title: Qiu-Yue Duan: Innovator in Boundary-Scan Testing Technology

Introduction

Qiu-Yue Duan is a notable inventor based in Shanghai, China. He has made significant contributions to the field of boundary-scan testing technology, holding a total of 4 patents. His work focuses on improving the efficiency and effectiveness of testing systems in electronic devices.

Latest Patents

One of his latest patents is the "JTAG standard pin test system." This invention discloses a boundary-scan standard pin test system that connects to-be-tested slots to form various series chains. The system utilizes a TAP controller to provide a boundary-scan format test signal, enhancing the efficiency of testing multiple boards. Another significant patent is the "System of performing boundary scan test on pin through test point and method thereof." This invention allows for testing connectors in computer products by searching for the closest test point when a pin cannot perform a boundary scan test. This method improves test coverage and reduces costs compared to conventional methods.

Career Highlights

Qiu-Yue Duan has worked with prominent companies such as Inventec Corporation and Inventec (Pudong) Technology Corporation. His experience in these organizations has contributed to his expertise in developing innovative testing solutions.

Collaborations

Throughout his career, Qiu-Yue Duan has collaborated with talented individuals, including Xin-Ying Xie and Ben Han. These partnerships have fostered a creative environment that has led to the development of advanced testing technologies.

Conclusion

Qiu-Yue Duan's contributions to boundary-scan testing technology have made a significant impact in the field. His innovative patents and collaborative efforts continue to enhance testing efficiency in electronic devices.

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