Puneet Sharma

This inventor holds 4 USPTO granted patents. Top assignees: Advanced Micro Devices Corporation, Meta Platforms, Inc.. Active years: 1998-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Puneet Sharma. Retrieved from https://idiyas.com/inventor/puneet-sharma-3wpc4uj5

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4

% Patents Active = 50.0

Average Co-Inventor Count = 2.4

ph-index = 2

Forward Citations = 17(Granted Patents)

Company Filing History:

2 out of 13,168

Advanced Micro Devices Corporation

where one patent can have more than one assignee

Years Active: 1998-2026

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4 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12675207 - Hierarchical discussion interface system with bidirectional comment streaming and central input routing (2026-07-07),

2. 10511886 - Latency and CPU utilization control for content item selection (2019-12-17),

3. 5960463 - Cache controller with table walk logic tightly coupled to second level (1999-09-28),

4. 5761736 - Apparatus and method for implementing multiple scaled states in a state (1998-06-02),

Title: Puneet Sharma: Innovator in Content Selection and Cache Control Technologies

Introduction

Puneet Sharma is a notable inventor based in San Jose, CA. He has made significant contributions to the fields of content selection and cache control technologies. With a total of 4 patents, his work has had a considerable impact on the efficiency of online systems.

Latest Patents

One of Puneet's latest patents is titled "Latency and CPU utilization control for content item selection." This invention addresses the challenges faced by online systems when presenting content items to users. The content selection system utilizes a feedback control mechanism to assess the latency period and CPU utilization of each computing device involved. By comparing these metrics to target values, the system optimizes the amount of information evaluated by each device.

Another significant patent is "Cache controller with table walk logic tightly coupled to second level." This invention enhances address translation circuitry by tightly coupling table walk logic with second-level access logic. The second level control unit can operate in two modes: translate mode and access mode. This innovation not only saves space but also increases speed, eliminating unnecessary access to the first level cache and reducing contention.

Career Highlights

Puneet has worked with prominent companies such as Advanced Micro Devices Corporation and Facebook, Inc. His experience in these organizations has allowed him to develop and refine his innovative ideas, contributing to advancements in technology.

Collaborations

Puneet has collaborated with talented individuals, including John Gregory Favor and Vibhor Rastogi. These partnerships have fostered a creative environment that has led to the development of groundbreaking technologies.

Conclusion

Puneet Sharma's contributions to content selection and cache control technologies demonstrate his innovative spirit and technical expertise. His patents reflect a commitment to improving system efficiency and performance.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]