Frýdlant nad Ostravicí, Czechia

Petr Kostelník

This inventor holds 1 USPTO granted patent. Top assignee: Semiconductor Components Industries, LLC. Active years: 2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Petr Kostelník. Retrieved from https://idiyas.com/inventor/petr-kostelník

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 7.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2015

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1 patent (USPTO):Explore Patents

Title: The Innovations of Petr Kostelník

Introduction

Petr Kostelník is a notable inventor based in Frenštát pod Radhoštěm, Czech Republic. He has made significant contributions to the field of semiconductor technology. His work focuses on innovative methods that enhance the manufacturing processes of semiconductor devices.

Latest Patents

Kostelník holds a patent for "Methods of laser marking semiconductor substrates." This patent outlines various methods for making semiconductor devices, showcasing his expertise in the field. He has 1 patent to his name, reflecting his commitment to advancing technology.

Career Highlights

Petr Kostelník is currently employed at Semiconductor Components Industries, LLC, where he applies his knowledge and skills to develop cutting-edge semiconductor solutions. His role in the company allows him to collaborate with other talented professionals in the industry.

Collaborations

Some of his coworkers include Jan Sik and Lukás Válek, who contribute to the innovative environment at Semiconductor Components Industries, LLC. Their teamwork fosters creativity and drives advancements in semiconductor technology.

Conclusion

Petr Kostelník's contributions to semiconductor technology through his patent and work at Semiconductor Components Industries, LLC highlight his role as an influential inventor in the field. His dedication to innovation continues to shape the future of semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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