Peter J Lim

Title: The Innovations of Peter J Lim

Introduction

Peter J Lim is a notable inventor based in San Jose, California. He has made significant contributions to the field of integrated circuits, holding a total of 4 patents. His work focuses on enhancing the functionality and reliability of CMOS technology.

Latest Patents

One of his latest inventions is a CMOS I/O circuit with high-voltage input tolerance. This invention provides an input/output circuit in a CMOS integrated circuit that can withstand pad voltages higher than the supply voltages. The design includes a pair of first polarity-type transistors connected in series between a first supply voltage terminal and the input/output pad, along with a pair of second polarity-type transistors connected in series between a second supply voltage terminal and the pad. The circuit is designed to maintain a high impedance state even when the pad voltage exceeds the supply voltage range.

Another significant patent is the CMOS low-voltage comparator. This comparator circuit improves symmetry of operation by incorporating two delay paths to facilitate both rising and falling input transitions. The design features an equal number and type of current mirrors, along with an input differential pair that connects both delay paths to a single transistor of the pair.

Career Highlights

Peter has worked with several companies throughout his career, including Oak Technology, Inc. and Chrontel Inc. His experience in these organizations has contributed to his expertise in the field of semiconductor technology.

Collaborations

One of his notable coworkers is Tat C Choi, with whom he has collaborated on various projects.

Conclusion

Peter J Lim's innovative contributions to CMOS technology have significantly advanced the field of integrated circuits. His patents reflect a commitment to improving electronic device performance and reliability.