Reading, United Kingdom

Peter Brookes

This inventor holds 1 USPTO granted patent. Top assignee: Altera Corporation. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Peter Brookes. Retrieved from https://idiyas.com/inventor/peter-brookes

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 16(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: The Innovations of Peter Brookes

Introduction

Peter Brookes is a notable inventor based in Reading, GB. He has made significant contributions to the field of technology, particularly in the area of hardware and software integration. His work has led to the development of innovative solutions that enhance the functionality of programmable logic devices.

Latest Patents

Peter holds a patent for a method and apparatus that allows for the co-verification of hardware and software elements asynchronously from a programmable logic device (PLD). This patent represents a significant advancement in the field, providing a more efficient way to ensure that hardware and software components work seamlessly together.

Career Highlights

Peter is currently employed at Altera Corporation, a leading company in the field of programmable logic devices. His role at Altera has allowed him to further his research and development efforts, contributing to the company's reputation for innovation and excellence in technology.

Collaborations

Throughout his career, Peter has collaborated with talented individuals such as Nigel Gray and Andrew Hall. These partnerships have fostered a creative environment that has led to the successful development of various projects and innovations.

Conclusion

Peter Brookes is a distinguished inventor whose work in hardware and software co-verification has made a lasting impact on the technology industry. His contributions continue to influence advancements in programmable logic devices and inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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