Emmaus, PA, United States of America

Peixin Zhong

This inventor holds 3 USPTO granted patents. Top assignees: Nec USA, Inc., Other. Active years: 2000-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Peixin Zhong. Retrieved from https://idiyas.com/inventor/peixin-zhong-0a8oi40s

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.6

ph-index = 3

Forward Citations = 89(Granted Patents)


Location History:

  • Princeton, NJ (US) (2000 - 2001)
  • Emmaus, PA (US) (2002)

Company Filing History:


Years Active: 2000-2002

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3 patents (USPTO):Explore Patents

Title: Peixin Zhong: Innovator in SAT Solver Architecture

Introduction

Peixin Zhong is a notable inventor based in Emmaus, PA (US). He has made significant contributions to the field of Boolean satisfiability (SAT) problem-solving. With a total of 3 patents, his work focuses on enhancing the efficiency and performance of SAT solvers.

Latest Patents

One of Peixin Zhong's latest patents is titled "Method and apparatus for SAT solver architecture with very low synthesis and layout overhead." This invention presents a method for implementing communication between literals and clauses of a Boolean SAT problem using a time-multiplexed pipelined bus architecture. This approach allows for identical circuit designs across different instances of the SAT problem, minimizing the incremental synthesis and place-and-route efforts. The time-multiplexing feature enables dynamic addition of clauses into the SAT solver algorithm, resulting in high clock speeds due to the highly pipelined architecture.

Another significant patent is "Configurable hardware system implementing Boolean Satisfiability and method thereof." This invention discloses a configurable hardware system and method for creating instance-specific SAT-solver circuits. The design is tailored for per-formula implementation, making it suitable for current and next-generation FPGA technologies. Hardware simulations indicate that this system can achieve a speedup of one to three orders of magnitude over traditional software implementations for challenging SAT problems.

Career Highlights

Peixin Zhong has worked with various companies, including NEC USA, Inc. His experience in the industry has contributed to his innovative approach to solving complex problems in the realm of SAT solvers.

Collaborations

Throughout his career, Peixin Zhong has collaborated with notable individuals such as Pranav N Ashar and Margaret Martonosi. These collaborations have likely enriched his work and contributed to the advancements in his field.

Conclusion

Peixin Zhong's contributions to SAT solver architecture demonstrate his innovative spirit and commitment to enhancing computational efficiency. His patents reflect a deep understanding of the challenges in Boolean satisfiability and offer promising solutions for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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