Pei-Chun Peter Liu

This inventor holds 4 USPTO granted patents. Top assignees: International Business Machines Corporation, Motorola Corporation. Active years: 1997-2001.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pei-Chun Peter Liu. Retrieved from https://idiyas.com/inventor/pei-chun-peter-liu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4

% Patents Active = 100.0

Average Co-Inventor Count = 3.9

ph-index = 3

Forward Citations = 48(Granted Patents)

Company Filing History:

4 out of 166,351

International Business Machines Corporation

where one patent can have more than one assignee

Years Active: 1997-2001

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4 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6240487 - Integrated cache buffers (2001-05-29),

2. 6064245 - Dynamic circuit for capturing data with wide reset tolerance (2000-05-16),

3. 5682495 - Fully associative address translation buffer having separate segment and (1997-10-28),

4. 5604879 - Single array address translator with segment and page invalidate ability (1997-02-18),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]