San Jose, CA, United States of America

Nuthan Prasad Bangalore Narasimhamurthy

This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Hewlett Packard Enterprise Development LP. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Nuthan Prasad Bangalore Narasimhamurthy. Retrieved from https://idiyas.com/inventor/nuthan-prasad-bangalore-narasimhamurthy

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Nuthan Prasad Bangalore Narasimhamurthy: Inventor in Memory-Capacity Monitoring

Introduction

Nuthan Prasad Bangalore Narasimhamurthy is an inventor based in San Jose, California. His patent work addresses how computing systems can identify potential memory-capacity problems from limited or intermittent device alerts.

Latest Patents

One patent is listed for Narasimhamurthy: “Detecting Memory Capacity Anomalies in Sparse Data Environments.” The invention analyzes sparse or sporadic alert data from a user device as a time-series dataset to detect anomalies that may indicate memory-capacity issues. After detecting an anomaly, the system can initiate an associated action, such as adjusting memory usage, adding memory, or reclaiming memory through a local command.

Career Highlights

Narasimhamurthy is associated with Hewlett Packard Enterprise Development LP. His listed patent reflects work on using device-generated data to anticipate memory concerns and support responsive system actions.

Collaborations

His listed coworkers include Manoj Srivatsav and Dhishankar Sengupta.

Conclusion

Nuthan Prasad Bangalore Narasimhamurthy’s patent focuses on detecting memory-capacity anomalies from sparse alert data and enabling actions to address them.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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