This inventor holds 1 USPTO granted patent. Top assignee: Nec Corporation. Active years: 1998.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1998
Title: Noriya Kobayashi: Innovator in Logic Circuit Processing
Introduction
Noriya Kobayashi is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of logic circuit processing. His innovative work has led to the development of a unique patent that addresses graphic delay data in logic circuits.
Latest Patents
Kobayashi holds a patent for a "System and method for processing graphic delay data of logic circuit." This patent involves a delay network of logic circuit delay data composed of a first set of vertices and a first set of weighted directional edges. The invention converts this network into a more efficient structure, enhancing the processing capabilities of logic circuits. He has 1 patent to his name.
Career Highlights
Noriya Kobayashi is currently employed at NEC Corporation, a leading technology company known for its advancements in information technology and electronics. His role at NEC has allowed him to further his research and development in logic circuits, contributing to the company's innovative projects.
Collaborations
Kobayashi collaborates with Sharad Malik, a fellow innovator in the field. Their partnership has fostered a creative environment that encourages the exchange of ideas and technological advancements.
Conclusion
Noriya Kobayashi is a notable inventor whose work in logic circuit processing has made a significant impact in the technology sector. His contributions continue to influence advancements in the field, showcasing the importance of innovation in modern technology.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile