Kulim, Malaysia

Ngee Kiat Chieng

This inventor holds 1 USPTO granted patent. Top assignee: Altera Corporation. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ngee Kiat Chieng. Retrieved from https://idiyas.com/inventor/ngee-kiat-chieng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: Ngee Kiat Chieng: Inventor of a Programmable Memory Power-Down Scheme.

Introduction

Ngee Kiat Chieng is an inventor associated with Kulim, Malaysia, and Altera Corporation. His work includes an invention for selectively supplying power to used portions of an embedded memory array.

Latest Patents

Chieng is credited with 1 patent: “Programmable Power Down Scheme for Embedded Memory Block.” The invention describes an integrated circuit that selectively provides power to the portions of a memory array used to store digital data. It uses global and local power buses connected through programmable vias, with the memory array remapped so unused column portions become unused row portions. The vias are positioned during circuit design to direct power to the array’s used portions.

Career Highlights

Chieng’s listed patent work is associated with Altera Corporation and addresses power management in embedded memory. The design aims to avoid supplying power to unused portions of a memory array.

Collaborations

Wei Yee Koay and Teng Chow Ooi are identified as Chieng’s coworkers. The available information does not specify their roles in the patent.

Conclusion

Ngee Kiat Chieng’s patent describes a programmable approach to reducing unnecessary power delivery in embedded memory, reflecting his contribution to integrated-circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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