Singapore, Singapore

Ng Yeow Keong

This inventor holds 1 USPTO granted patent. Top assignee: M-Mos Sdn.bhd. Active years: 2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ng Yeow Keong. Retrieved from https://idiyas.com/inventor/ng-yeow-keong

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2012

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1 patent (USPTO):Explore Patents

Title: Innovations of Ng Yeow Keong in Semiconductor Technology.

Introduction

Ng Yeow Keong is a notable inventor based in Singapore, recognized for his contributions to semiconductor technology. He holds a patent that addresses critical challenges in the fabrication of MOSFETs, particularly in the formation of gate oxides.

Latest Patents

Ng Yeow Keong's patent focuses on the "Elimination of gate oxide weak spot in deep trench." This invention involves a MOSFET with a trench depth ranging from 0.7 to 2.0 micrometers. The process begins with opening a trench in a semiconductor substrate, followed by the deposition of a thick insulator layer within the trench. This layer is designed to be significantly thicker at the trench bottom compared to the sidewalls. After removing the insulator layer from the sidewalls, composite dual layers are created to form the Gate Oxide. An alternative embodiment includes depositing the insulator layer after the growth of the Gate Oxide, stopping at a thin Nitride layer that serves as a stop layer during the insulator pullback at the trench sidewall and during Polysilicon CMP. This innovation effectively eliminates weak spots at the trench bottom corner, which are typically encountered when growing Gate Oxide in a 0.2 micrometers deep trench with thick bottom oxide. Additionally, it ensures good control over the trench shape and the thickness profile of the Gate Oxide.

Career Highlights

Ng Yeow Keong is associated with M-MOS Sdn. Bhd., where he applies his expertise in semiconductor technology. His work has significantly contributed to advancements in the field, particularly in improving the reliability and performance of MOSFETs.

Collaborations

Ng Yeow Keong has collaborated with notable colleagues, including Fwu-Iuan Hshieh and Yee Ai Fai. Their combined efforts have fostered innovation and development within their projects.

Conclusion

Ng Yeow Keong's innovative work in semiconductor technology, particularly his patent on eliminating gate oxide weak spots, showcases his significant contributions to the field. His collaboration with esteemed colleagues further enhances the impact of his inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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