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Colorado Springs, CO, United States of America

Newell E Chiesl

This inventor holds 7 USPTO granted patents. Top assignee: Lsi Logic Corporation. Active years: 2001-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Newell E Chiesl. Retrieved from https://idiyas.com/inventor/newell-e-chiesl

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7

% Patents Active = 100.0

Average Co-Inventor Count = 1.7

ph-index = 4

Forward Citations = 42(Granted Patents)

Company Filing History:

Lsi Logic Corporation

Years Active: 2001-2004

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7 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6775630 - Web-based interface with defect database to view and update failure events (2004-08-10),

2. 6770505 - Arrangement for measuring pressure on a semiconductor wafer and an associated method for fabricating a semiconductor wafer (2004-08-03),

3. 6716364 - Method and apparatus for detecting presence of residual polishing slurry subsequent to polishing of a semiconductor wafer (2004-04-06),

4. 6641635 - Liquid based air filtration system (2003-11-04),

5. 6582568 - First stage salicidation of cobalt during cobalt deposition or subsequent Ti or Tin cap deposition using energy from a directional plasma (2003-06-24),

6. 6375791 - Method and apparatus for detecting presence of residual polishing slurry subsequent to polishing of a semiconductor wafer (2002-04-23),

7. 6177305 - Fabrication of metal-insulator-metal capacitive structures (2001-01-23),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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