Osaka, Japan

Naoki Hishikawa

This inventor holds 1 USPTO granted patent. Top assignee: Panasonic Corporation. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naoki Hishikawa. Retrieved from https://idiyas.com/inventor/naoki-hishikawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: Naoki Hishikawa and His Semiconductor Circuit Patent.

Introduction

Naoki Hishikawa is an inventor associated with Osaka, Japan, and Panasonic Corporation. His recorded patent concerns a multi-channel semiconductor integrated circuit.

Latest Patents

Hishikawa is credited with 1 patent: “Multi-channel semiconductor integrated circuit.” The invention includes high-side and low-side transistors, a level-shift circuit that drives the high-side transistor, and a pre-driver circuit that drives the low-side transistor. The transistors’ connection point serves as an output terminal. The level-shift circuit uses two N-type MOS transistors whose gates are driven by the pre-driver circuit. A diode connects to the drain of the MOS transistor whose gate is not connected to the high-side transistor’s gate, and its cathode connects to the output terminal.

Career Highlights

The available information associates Hishikawa’s work with Panasonic Corporation and identifies his patent in semiconductor integrated-circuit design.

Collaborations

Hiroki Matsunaga and Jinsaku Kaneda are listed as Hishikawa’s coworkers.

Conclusion

Naoki Hishikawa’s recorded invention addresses semiconductor circuit design through a combination of transistor-driving circuits and a diode connection, and is associated with his work at Panasonic Corporation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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