Suwon-si, South Korea

Myeongsik Ryu

This inventor holds 1 USPTO granted patent. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Myeongsik Ryu. Retrieved from https://idiyas.com/inventor/myeongsik-ryu-buvmdsbu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Myeongsik Ryu and Memory Device Innovation.

Introduction

Myeongsik Ryu is an inventor based in Suwon-si, South Korea. His patent work includes a memory-device design focused on biasing dummy global bitlines.

Latest Patents

Ryu is associated with 1 patent, titled “Memory Device for Biasing Dummy Global Bitline.” The invention describes a memory cell region with first and second global bitlines near its edges and dummy global bitlines in its central portion. A bitline sense amplifier connects to these bitlines. A first layer in the memory cell region connects to a second layer in the sense amplifier region and applies a bias voltage to each dummy global bitline.

Career Highlights

Ryu works at Samsung Electronics Ltd. His patent reflects work on memory-device architecture and the electrical biasing of dummy bitlines.

Collaborations

The provided information identifies Kyoungmin Kim and Inseok Baek as Ryu’s coworkers.

Conclusion

Myeongsik Ryu’s patent describes a memory-device arrangement that applies bias voltage to dummy global bitlines, contributing to Samsung Electronics’ work in memory technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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