Miyazaki, Japan

Mitsuo Terada

This inventor holds 2 USPTO granted patents. Top assignees: Komatsu Electronic Metals Co., Ltd., Komatsu Plastics Industrial Co., Ltd., Sumco Techxiv Kabushiki Kaisha. Active years: 1999-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mitsuo Terada. Retrieved from https://idiyas.com/inventor/mitsuo-terada-1eur9uc3

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 5.3

ph-index = 2

Forward Citations = 37(Granted Patents)


Company Filing History:


Years Active: 1999-2008

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2 patents (USPTO):Explore Patents

Title: Innovations by Mitsuo Terada

Introduction

Mitsuo Terada is a notable inventor based in Miyazaki, Japan. He has made significant contributions to the field of semiconductor technology, particularly in the inspection and processing of wafer surfaces. With a total of 2 patents, his work has advanced the efficiency and precision of wafer inspection processes.

Latest Patents

Mitsuo Terada's latest patents include an apparatus for inspecting wafer surfaces and methods for judging defective wafers. His innovative system allows for the detection of scratches and staining on wafer surfaces based on an LPD map obtained from a particle counter. By detecting the aggregation of clustered point defects from two-dimensional distribution information, the inspection efficiency and precision of judgments regarding 'defective' status can be significantly improved. Additionally, the system enables the detection of trends in the generation of scratches and staining during specific processes by accumulating wafer surface information. This information can be shared between wafer suppliers and consumers, facilitating better process improvement plans. Another patent involves a gasket designed for use in a container that ensures superior airtightness to prevent contamination of semiconductor wafers. The gasket features protrusions that assist in providing an airtight seal, and the container is securely fastened with clips.

Career Highlights

Throughout his career, Mitsuo Terada has worked with prominent companies such as Sumco Techxiv Kabushiki Kaisha and Komatsu Electronic Metals Co., Ltd. His experience in these organizations has contributed to his expertise in semiconductor technology and wafer processing.

Collaborations

Mitsuo has collaborated with notable coworkers, including Kouzou Matsusita and Yukinori Matsumura. Their joint efforts have furthered advancements in the field of semiconductor inspection and processing.

Conclusion

Mitsuo Terada's contributions to semiconductor technology through his patents and collaborations have significantly impacted the industry. His innovative approaches to wafer inspection and processing continue to enhance the efficiency and reliability of semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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