Tokyo, Japan

Miho Yokota

This inventor holds 6 USPTO granted patents. Top assignee: Mitsubishi Denki Kabushiki Kaisha. Active years: 1995-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Miho Yokota. Retrieved from https://idiyas.com/inventor/miho-yokota

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.5

ph-index = 4

Forward Citations = 46(Granted Patents)


Location History:

  • Itami, JP (1995 - 1997)
  • Tokyo, JP (1997 - 1999)

Company Filing History:


Years Active: 1995-1999

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6 patents (USPTO):Explore Patents

Title: Miho Yokota: Semiconductor Circuit and Layout Innovations

Introduction

Miho Yokota is an inventor based in Tokyo, Japan, whose patent work addresses semiconductor device design and integrated-circuit layout. Her listed inventions include a field-effect transistor array using refractory metal silicide and a clock driver circuit for semiconductor integrated circuits. Yokota is associated with Mitsubishi Electric Corporation and has 6 patents.

Latest Patents

Field Effect Transistor Array Including Refractory Metal Silicide. This invention connects PMOS and NMOS transistors through a refractory-metal salicide layer in their source and drain regions. Because the layer has low electrical resistance, it can partly replace first-level aluminum wiring within a cell. This approach frees space for additional wiring and increases flexibility in chip layout. In microcells used in logic circuits, including gate arrays, lateral wiring-grid points can also serve as wiring areas.

Clock Driver Circuit and Semiconductor Integrated Circuit Device. This design organizes macro-cell regions into portions containing basic circuits. A clock input driver feeds a first common line, which connects to multiple predrivers. Their outputs feed a second common line, which in turn connects to main drivers. The main drivers supply a third common line connected to clock-signal lines serving internal circuits that require clock signals. The arrangement describes a structured way to distribute clock signals across an integrated circuit.

Career Highlights

Yokota’s listed patent work focuses on semiconductor circuitry, transistor interconnections, chip-layout efficiency, and clock distribution. These inventions address practical design considerations, including wiring space, resistance, and the delivery of clock signals to internal circuit blocks.

Collaborations

Yokota is associated with Mitsubishi Electric Corporation. Her listed coworkers include Nobuyuki Ikeda and Takenobu Iwao.

Conclusion

Miho Yokota’s patent portfolio reflects contributions to semiconductor design, particularly transistor-array wiring and integrated-circuit clock distribution.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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